1. Field of the Invention
The present invention relates to a semiconductor device in which electrodes are electrically brought into contact with a semiconductor element under pressure, and a method of assembling the same.
2. Description of the Background Art
The so-called flat pack type power semiconductor device has such a structure that a semiconductor element is held by external electrodes from both upper and lower sides.
Such a semiconductor device generates a considerable amount of heat due to a high current flow through the semiconductor element, and if the same is used in such a condition that the aforementioned external electrodes are directly brought into contact with the semiconductor element under pressure, thermal stress may be caused between the external electrodes and the semiconductor element due to difference in thermal expansion coefficient therebetween, to break the semiconductor element.
In general, therefore, electrode plates for relieving the thermal stress are interposed between the external electrodes and the semiconductor element.
Since the thermal stress is increased if such electrode plates are fixed to the semiconductor element by solder or the like, employed is a full pressure contact type semiconductor device which keeps electrical connection therebetween only by mechanical contact.
FIG. 1 is a longitudinal sectional view of a center gate type pressure contact type semiconductor device which is disclosed in Japanese Patent Laid-Open Gazette No. 2-4672 (1990) as an example of a conventional full pressure contact type semiconductor device.
As shown in FIG. 1, this pressure, contact type semiconductor device 1 comprises a semiconductor element 2, an anode electrode plate 5, a cathode electrode plate 6, an external anode electrode 10A, an external cathode electrode 10K. The semiconductor element 2 is held by the external anode and cathode electrodes 10A and 10K. Thus, the semiconductor element 2 is electrically brought into contact with the external anode electrode 10A through the electrode plate 5 as well as with the external cathode electrode 10K through the electrode plate 6 under pressure.
The semiconductor element 2 is formed by a discoidal silicon substrate which is provided with at least one P-N junction. The semiconductor element 2 includes two major surfaces, that is, upper and lower major surfaces. An anode metallization layer 3A is formed on the upper major surface while gate and cathode metallization layers 3G and 3K are formed on the lower major surface by using the same method. The gate metallization layer 3G is provided on a central portion as a gate electrode and the cathode metallization layer 3K is provided around the same as a cathode electrode.
The outer peripheral edge portion of the semiconductor element 2 is covered with a protective member 4. The protective member 4 is of ring shape concentrically with the semiconductor substrate 2 and has an outer diameter which coincides with an inner diameter of a casing 7. Hence, when the semiconductor element 2 is inserted into the casing 7, the semiconductor element 2 is protected from the inner wall of the casing 7 and is located in the casing 7 with high accuracy.
Outer peripheral surfaces of the anode and cathode electrode plates 5 and 6 are engaged with the inner peripheral surface of the protective member 4, to be located with respect to the semiconductor element 2.
The conductive external anode electrode 10A includes a base portion 11A and a convex portion 12A. A metal flange 13A is fixed to the outer peripheries of the base portion 11A. The conductive external cathode electrode 10 K is identical in structure to the anode electrode 10A.
The casing 7, which is made of a ceramic material in the form of a cylinder, stores the electrode plates 5 and 6 and the convex portions 12A and 12K of the external electrodes 10 A and 10K for holding the both major surfaces of the semiconductor element 2 from upper and lower sides, and thereafter the flanges 13A and 13K are fixed to upper and lower end surfaces of the casing 7 by brazing respectively. Thus, the semiconductor element 2 and the electrode plates 5 and 6 are fixed in the casing 7 while being held by the external electrodes 10A and 10K.
The cathode electrode plate 6 has a through hole 8 in its center while the external cathode electrode 10K being provided with a hole 9 in correspondence thereto, whereby an engaging hole is defined by the through hole 8 and the hole 9. Hence, a gate electrode holder 14 is slidably engaged in the engaging hole.
An internal gate electrode 15 is connected to a lead wire 16, which passes through a head portion of the gate electrode holder 14 and is drawn out to the exterior of the casing 7 through an insulating tube 17 passing through the casing 7, to be connected to an external gate electrode 18 by welding.
The gate electrode holder 14 is made of insulating material, and its lower end is in contact with and upwardly urged by a spring 19. As the result, the internal gate electrode 15 supported by the gate electrode holder 14 is brought into pressure contact with the gate metallization layer 3G, to be electrically connected with the same.
When the pressure contact type semiconductor device 1 having such a structure is employed in a prescribed apparatus, the pressure contact type semiconductor device 1 is inserted between an anode member 20A and a cathode member 20K of the prescribed apparatus. These anode and cathode members 20A and 20K are urged by external springs (not shown) along arrows shown in the figure, so that the upper surface of the cathode member 20K comes into pressure contact with the external cathode electrode 10K while the lower surface of the anode member 20A comes into pressure contact with the external anode electrode 10A. Thus, the cathode member 20K is reliably electrically connected to the cathode metallization layer 3K through the external cathode electrode 10K and the cathode electrode plate 6 while the anode member 20A is also reliably electrically connected to the anode metallization layer 3A through the external anode electrode 10A and the anode electrode plate 6.
The external gate electrode 18 is also connected to a gate electrode connecting member (not shown) of the applied apparatus.
When voltages are applied to the anode member 20A and the cathode member 20K in the pressure-connected state, a current flows through the interior of the semiconductor device 1 so that the semiconductor element 2 generates heat, which in turn is transferred through the electrode plates 5 and 6 and the external electrodes 10A and 10K to the anode member 20A and the cathode member 20K, so as to be carried away.
The electrode plates 5 and 6 between the external electrodes 10A and 10K and the semiconductor element 2 relieve the thermal stress therebetween, resulting in prevention against serious damages to the semiconductor element 2.
In the aforementioned structure of the conventional semiconductor device 1, however, the semiconductor element 2 is so loosely fixed in the casing 7 that the semiconductor element 2 may be displaced from the electrode plates 5 and 6 and may be broken when the semiconductor device 1 is carried in a state being detached from the applied apparatus.
The protective member 4 acts to protect the outer peripheral edge of the semiconductor element 2 in addition to location of the electrode plates 5 and 6 as hereinabove described. Thus, a locational accuracy depends on the configuration of the protective member 4. However, the protective member 4 is restricted in applicable material, and hence it is difficult to improve working accuracy of the protective member 4 that clearances are defined between the inner peripheral surface of the protective member 4 and the outer peripheries of the electrode plates 5 and 6 as shown in FIG. 1. As a result, the clearances cause displacement in carriage of the semiconductor device 1.
Assuming that an electrode plate 5 is rightwardly displaced as shown in FIG. 2, for example, a couple moment M is applied to a semiconductor element 2 by end portions of the electrode plates 5 and 6 if an impact or vibration is applied to a semiconductor device 1 from the exterior during carriage thereof. In general, a semiconductor element 2 is formed by a thin silicon substrate of about several hundred .mu.m in thickness, and is mechanically so fragile that the same may be immediately broken upon application of the aforementioned couple moment M.
In general, therefore, a holder 21 shown in FIG. 3 is employed to carry the semiconductor device 1 under pressure. The holder 21 for pressure-carriage comprises an end plate 22 and bolts 23 which are upwardly provided on this end plate 22 so that upper portions thereof pass through both end portions of a downwardly warped plate spring 24, which in turn is fastened by nuts 25.
The semiconductor device 1 is fixed to the holder 21 in the following manner: First, the semiconductor device 1 is placed on the upper surface of the end plate 22 through a protective disc 26a. Next, another protective disc 26b is placed on the semiconductor device 1, and then the nuts 25 are tightened to downwardly move the plate spring 24. Hence, a lower curved portion 24a of the plate spring 24 urges the upper surface of the protective disc 26b downwardly, to thereby fix the semiconductor device 1.
Thus, the semiconductor device 1 can be carried while being held by the holder 21, whereby the electrode plates 5 and 6 will not be displaced during carriage dissimilarly to the above, and no couple moment M as shown in FIG. 2 is applied to break the semiconductor element 2 even if an impact is applied to the semiconductor device 1 from the exterior.
However, it is extremely troublesome to hold a number of semiconductor devices 1 one by one in such holders 21 every carriage, while a transportation space is increased by such holders 21, and hence this means for holding the semiconductor device 1 is unsuitable for mass transportation.
Further, specific consideration is required for attaching and detaching the semiconductor device 1 to and from such a holder 21 and mounting the same on an applied apparatus, not to apply a large impact thereto.